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low voltage, cmos multimedia switch adg790 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007 analog devices, inc. all rights reserved. features single-chip audio/video/data switching solution wide bandwidth section rail-to-rail signal switching capability compliant with full speed usb 2.0 signaling (3.6 v p-p) compliant with high speed usb 2.0 signaling (400 mv p-p) supports usb data rates up to 480 mbps 550 mhz, 3 db bandwidth low r on : 5.9 typical excellent matching between channels low distortion section low r on : 3.9 typical 230 mhz, 3 db bandwidth (spdt) 160 mhz, 3 db bandwidth (4:1 multiplexers) single-supply operation: 1.65 v to 3.6 v typical power consumption: <0.1 w pb-free packaging: 30-ball wlcsp (3 mm 2.5 mm) applications cellular phones pmps mp3 players audio/video/data/usb switching functional block diagram s6b s6a d6 decoder s6d s6c in3in2 in1 s 1 a s 1b d1 s4a s4b d4 s5b s5a d5 s5d s5c s/d s 2 a s 2b d2 s 3 a s 3b d3 gnd v dd adg790 wide bandwidth section low distortion section 0 6357-001 figure 1. general description the adg790 is a single-chip, cmos switching solution that comprises four spdt switches and two 4:1 multiplexers. the internal architecture of the device provides two switching sections, a wide bandwidth section and a low distortion section. the wide bandwidth section contains three spdt switches that exhibit low on resistance with excellent flatness and channel matching. this, combined with wide bandwidth, makes the three-spdt-switch configuration ideal for high frequency signals, such as full speed (12 mbps) and high speed (480 mbps) usb signals and high resolution video signals. the low distortion section contains a single spdt switch and two 4:1 multiplexers that exhibit very low on resistance and excellent flatness, making these switches ideal for a wide range of applications, including low distortion audio applications and low resolution video (cvbs and s-video) applications. all switches conduct equally well in both directions when on and block signals up to the supply rails when off. a 4-wire parallel interface controls the operation of the device and allows the user to control switches from both sections simul- taneously. this simplifies the design and provides a cost-effective, single-chip switching solution for portable devices where multiple signals share a single port connector. the shutdown (s/d) pin allows the user to disable all four spdt switches and force the 4:1 multiplexers into the s5b and s6b positions, respectively. the adg790 is packaged in a compact, 30-ball wlcsp (6 5 ball array) with a total area of 7.5 mm 2 (3 mm 2.5 mm). this tiny package size and its low power consumption make the adg790 an ideal solution for portable devices.
adg790 rev. 0 | page 2 of 20 table of contents features .............................................................................................. 1 applications....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications..................................................................................... 3 absolute maximum ratings............................................................ 5 esd caution.................................................................................. 5 pin configuration and function descriptions............................. 6 terminology ...................................................................................... 7 typical performance characteristics ............................................. 8 test circuits..................................................................................... 11 theory of operation ...................................................................... 13 wide bandwidth section........................................................... 13 low distortion section.............................................................. 13 control interface ........................................................................ 13 evaluation board ............................................................................ 14 using the adg790 evaluation board ..................................... 14 outline dimensions ....................................................................... 17 ordering guide .......................................................................... 17 revision history 1/07revision 0: initial version
adg790 rev. 0 | page 3 of 20 specifications v dd = 2.7 v to 3.6 v, gnd = 0 v, t a = C40c to +85c, all switch sections unless otherwise noted. table 1. parameter symbol test conditions/comments min typ 1 max unit analog switch analog signal range 0 v dd v on resistance r on v dd = 2.7 v, v s = 0 v to v dd , i ds = 10 ma (see figure 18 ) wide bandwidth section 2 5.9 8.8 low distortion section 3 3.9 5.5 on resistance flatness r flat(on) v dd = 2.7 v, v s = 0 v to v dd , i ds = 10 ma (see figure 18 ) wide bandwidth section 2 2.0 3.6 low distortion section 3 0.74 1.6 on resistance matching between channels 4 ?r on v dd = 2.7 v, v s = 0 v to v dd , i ds = 10 ma wide bandwidth section 2 0.52 low distortion section 3 (spdt) 0.1 low distortion section 3 (4:1 multiplexers) 0.3 leakage currents source off leakage i s (off) v dd = 3.6 v, v s = 0 v or 3.6 v, v d = 3.6 v or 0 v (see figure 19 ) 10 na channel on leakage i d , i s (on) v dd = 3.6 v, v s = v d = 0 v or 3.6 v (see figure 20 ) 10 na digital inputs (in1, in2, in3, s/d) input high voltage v inh 2.0 v input low voltage v inl 0.8 v input high/input low current i inl , i inh v in = v inl or v inh 0.005 0.1 a digital input capacitance c in 6 pf dynamic characteristics 5 t on t on r l = 50 , c l = 35 pf, v s = v dd /2 or 0 v (see figure 24 ) 20 32 ns t off t off r l = 50 , c l = 35 pf, v s = v dd /2 or 0 v (see figure 24 ) 9 15 ns propagation delay t d r l = 50 , c l = 35 pf wide bandwidth section 2 0.3 0.46 ns low distortion section 3 (spdt) 0.65 0.95 ns low distortion section 3 (4:1 multiplexers) 0.4 0.65 ns propagation delay skew t skew r l = 50 , c l = 35 pf wide bandwidth section 2 20 ps low distortion section 3 (4:1 multiplexers) 40 ps break-before-make time delay t bbm r l = 50 , c l = 35 pf, v s1 = v s2 = v dd /2 (see figure 25 ) 5 11 ns charge injection q inj v s = 0 v, r s = 0 , c l = 1 nf (see figure 26 ) wide bandwidth section 2 C0.57 pc low distortion section 3 6.2 pc off isolation r l = 50 , c l = 5 pf, f = 1 mhz (see figure 21 ) C74 db channel-to-channel crosstalk r l = 50 , c l = 5 pf, f = 1 mhz (see figure 22 ) C77 db total harmonic distortion thd + n r l = 32 , f = 20 hz to 20 khz, v s = 2 v p-p wide bandwidth section 2 1.2 % low distortion section 3 0.65 % C3 db bandwidth r l = 50 , c l = 5 pf (see figure 23 ) wide bandwidth section 2 550 mhz low distortion section 3 (spdt) 230 mhz low distortion section 3 (4:1 multiplexers) 160 mhz differential gain error ccir330 test signal wide bandwidth section 2 0.07 % low distortion section 3 (spdt) 0.08 % low distortion section 3 (4:1 multiplexers) 0.18 %
adg790 rev. 0 | page 4 of 20 parameter symbol test conditions/comments min typ 1 max unit differential phase error ccir330 test signal wide bandwidth section 2 0.13 degrees low distortion section 3 (spdt) 0.08 degrees low distortion section 3 (4:1 multiplexers) 0.19 degrees power supply rejection ratio psrr f= 10 khz, no decoupling capacitors C90 db source off capacitance c s (off) wide bandwidth section 2 3.5 pf low distortion section 3 11 pf drain off capacitance c d (off) wide bandwidth section 2 5.5 pf low distortion section 3 (spdt) 14 pf source/drain on capacitance c d , c s (on) wide bandwidth section 2 8.5 pf low distortion section 3 (spdt) 19 pf low distortion section 3 (4:1 multiplexers) 32 pf power requirements supply voltage v dd 1.65 3.6 v supply current i dd v dd = 3.6 v, digital inputs tied to 0 v or 3.6 v 0.1 1 a 1 all typical values are at t a = 25c, v dd = 3.3 v. 2 refers to all switches connected to pin d1, pin d2, and pin d3. 3 refers to all switches connected to pin d4 (spdt), pin d5, and pin d6 (4:1 multiplexers). 4 refers to the on resistance matching between the same channels (sxa and sxb, for example) from different multiplexers for the wide bandwidth section and the 4:1 multiplexers from the low distortion section. for the spdt switch from the low distortion section, it refers to the matching be tween the s4a and s4b channels. 5 guaranteed by design; not subject to production test.
adg790 rev. 0 | page 5 of 20 absolute maximum ratings t a = 25c, unless otherwise noted. table 2. parameter rating v dd to gnd C0.3 v to +4.6 v analog and digital pins 1 C0.3 v to v dd + 0.3 v or 10 ma, whichever occurs first peak current, s or d 100 ma (pulsed at 1 ms, 10% duty cycle maximum) continuous current, s or d 30 ma operating temperature range C40c to +85c storage temperature range C65c to +125c junction temperature 150c thermal impedance ( ja ) 2 80c/w reflow soldering (pb free) peak temperature 260c (+0c/C5c) time at peak temperature as per jedec j-std-20 1 overvoltages at in, s, or d are clamped by internal diodes. limit current to the maximum ratings given. 2 measured with the device soldered on a 4-layer board. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating can be applied at any one time. esd caution
adg790 rev. 0 | page 6 of 20 pin configuration and function descriptions top view (ball side down) not to scale 1 a b c d e f 234 ball a1 corner s1a s5a d5 s5c s4a d1 s5b in1 s5d d4 s1b gnd in2 v dd s4b s2b gnd in3 gnd s3b d2 s6b s/d s6d d3 s2a s6a d6 s6c s3a 5 06357-002 figure 2. 30-ball wlcsp (cb-30-1) table 3. pin function descriptions ball name mnemonic description a1 s1a source terminal for mux 1 (wide bandwid th section). can be an input or an output. a2 s5a source terminal for mux 5 (low distorti on section). can be an input or an output. a3 d5 drain terminal for mux 5 (low distorti on section). can be an input or an output. a4 s5c source terminal for mux 5 (low distorti on section). can be an input or an output. a5 s4a source terminal for mux 4 (low distorti on section). can be an input or an output. b1 d1 drain terminal for mux 1 (wide bandwidth section). can be an input or an output. b2 s5b source terminal for mux 5 (low distorti on section). can be an input or an output. b3 in1 logic control input. b4 s5d source terminal for mux 5 (low distorti on section). can be an input or an output. b5 d4 drain terminal for mux 4 (low distortion section). can be an input or an output. c1 s1b source terminal for mux 1 (wide bandwid th section). can be an input or an output. c2 gnd ground (0 v) reference. c3 in2 logic control input. c4 v dd most positive power supply terminal. c5 s4b source terminal for mux 4 (low distorti on section). can be an input or an output. d1 s2b source terminal for mux 2 (wide bandwid th section). can be an input or an output. d2 gnd ground (0 v) reference. d3 in3 logic control input. d4 gnd ground (0 v) reference. d5 s3b source terminal for mux 3 (wide bandwid th section). can be an input or an output. e1 d2 drain terminal for mux 2 (wide bandwidth section). can be an input or an output. e2 s6b source terminal for mux 6 (low distorti on section). can be an input or an output. e3 s/d shutdown logic control input. e4 s6d source terminal for mux 6 (low distorti on section). can be an input or an output. e5 d3 drain terminal for mux 3 (wide bandwidth section). can be an input or an output. f1 s2a source terminal for mux 2 (wide bandwid th section). can be an input or an output. f2 s6a source terminal for mux 6 (low distorti on section). can be an input or an output. f3 d6 drain terminal for mux 6 (low distortion section). can be an input or an output. f4 s6c source terminal for mux 6 (low distorti on section). can be an input or an output. f5 s3a source terminal for mux 3 (wide bandwid th section). can be an input or an output.
adg790 rev. 0 | page 7 of 20 terminology i dd positive supply current. v d (v s ) analog voltage on terminal d and terminal s. r on ohmic resistance between terminal d and terminal s. r flat (on) flatness is defined as the difference between the maximum and minimum value of on resistance as measured. r on on resistance match between any two channels. i s (off) source leakage current with the switch off. i d , i s (on) channel leakage current with the switch on. v inl maximum input voltage for logic 0. v inh minimum input voltage for logic 1. i inl (i inh ) input current of the digital input. c s (off) off switch source capacitance. measured with reference to ground. c d , c s (on) on switch capacitance. measured with reference to ground. c in digital input capacitance. t on delay time between the 50% and the 90% points of the digital input and switch on condition. t off delay time between the 50% and the 10% points of the digital input and switch off condition. t bbm on or off time measured between the 80% points of both switches when switching from one to the other. t d signal propagation delay through the switch measured between the 50% points of the input signal and its corre- sponding output signal. t skew difference in propagation delay between the selected inputs on the 4:1 multiplexers or any two spdt switches from the wide bandwidth section. charge injection a measure of the glitch impulse transferred from the digital input to the analog output during on-off switching. off isolation a measure of unwanted signal coupling through an off switch. crosstalk a measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. ?3 db bandwidth the frequency at which the output is attenuated by 3 db. insertion loss the loss due to the on resistance of the switch. thd + n the ratio of the harmonic amplitudes plus signal noise to the fundamental. differential gain error the measure of how much color saturation shift occurs when the luminance level changes. both attenuation and amplification can occur; therefore, the largest amplitude change between any two levels is specified and expressed in percent. differential phase error the measure of how much hue shift occurs when the luminance level changes. it can be a negative or a positive value and is expressed in degrees of subcarrier phase.
adg790 rev. 0 | page 8 of 20 typical performance characteristics 7.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 06357-039 v s (v) r on ( ? ) 7.0 6.5 6.0 5.5 5.0 4.5 t a = 25c i ds = 10ma v dd = 3.6v v dd = 3.3v v dd = 2.7v figure 3. on resistance vs. source voltage, wide bandwidth section 6.5 4.0 0 0.5 1.0 1.5 2.0 2.5 3.0 06357-040 v s (v) r on ( ? ) 6.0 5.5 5.0 4.5 v dd = 3.3v i ds = 10ma t a = +85c t a = +25c t a = ?40c figure 4. on resistance vs. temperature, wide bandwidth section 2.5 3.0 3.5 4.0 4.5 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 06357-041 v s (v) r on ( ? ) t a = 25c i ds = 10ma v dd = 3.6v v dd = 3.3v v dd = 2.7v figure 5. on resistance vs. source voltage, low distortion section 4.5 2.5 0 0.5 1.0 1.5 2.0 2.5 3.0 06357-042 v s (v) r on ( ? ) 4.3 4.1 3.9 3.7 3.5 3.3 3.1 2.9 2.7 v dd = 3.3v i ds = 10ma t a = +85c t a = +25c t a = ?40c figure 6. on resistance vs. temperature, low distortion section 20 18 16 14 12 10 8 6 4 ?40 ?20 0 20 40 60 80 06357-028 temperature (c) t on / t off (ns) t off t on v dd = 3.3v t a = 25c r l = 50 ? c l = 35pf figure 7. t on /t off times vs. temperature ?1 ?3 ?5 ?7 ?9 ?11 ?13 ?15 0.01 1000 06357-029 frequency (mhz) attenuation (db) 0.1 1 10 100 v dd = 3.3v t a = 25c wide bandwidth section low distortion section figure 8. on response vs. frequency, low distortion section (spdt)
adg790 rev. 0 | page 9 of 20 0 ?20 0.01 1000 06357-030 frequency (mhz) attenuation (db) 0.1 1 10 100 ?2 ?4 ?6 ?8 ?10 ?12 ?14 ?16 ?18 v dd = 3.3v t a = 25c figure 9. on response vs. frequency, low distortion section (4:1 multiplexers) 06357-021 x = 20ns/div y = 835mv/div figure 10. usb 1.1 eye diagram 06357-022 x = 250ps/div y = 100mv/div figure 11. usb 2.0 eye diagram ? 10 ?110 0.0001 1000 06357-033 frequency (mhz) attenuation (db) 0.001 0.01 0.1 1 10 100 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 v dd = 3.3v t a = 25c wide bandwidth and low distortion sections figure 12. off isol ation vs. frequency ? 20 ?120 0.0001 1000 06357-034 frequency (mhz) attenuation (db) 0.001 0.01 0.1 1 10 100 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 v dd = 3.3v t a = 25c wide bandwidth and low distortion sections input signal = 0dbm dc bias = 0.5v figure 13. crosstalk vs. frequency 1.3 0.5 10 100000 06357-035 frequency (hz) thd + n (%) 100 1000 10000 v dd = 3.3v r l = 32 ? v s = 2v p-p t a = 25c dc bias = 1.65v wide bandwidth section low distortion section 1.2 1.1 1.0 0.9 0.8 0.7 0.6 figure 14. thd + n vs. frequency
adg790 rev. 0 | page 10 of 20 500 450 400 350 300 250 200 150 100 50 0 0 0.5 1.0 1.5 2.0 2.5 3.0 06357-036 v in (v) i dd (a) v dd = 3.3v t a = 25c figure 15. supply current vs. input logic level 8 ?1 0 0.5 1.0 1.5 2.0 2.5 3.0 06357-037 v s (v) q inj (pc) 7 6 5 4 3 2 1 0 v dd = 3.3v c l = 1nf t a = 25c wide bandwidth section low distortion section figure 16. charge injection vs. source voltage 0 ?120 0.0001 1000 06357-038 frequency (mhz) psrr (db) 0.001 0.01 0.1 1 10 100 ?20 ?40 ?60 ?80 ?100 v dd = 3.3v t a = 25c wide bandwidth and low distortion sections. 0dbm signal superimposed on supply voltage. no decoupling capacitors used. figure 17. power supply reje ction ratio vs. frequency
adg790 rev. 0 | page 11 of 20 test circuits i ds v1 sd v s r on = v1/i ds 06357-003 figure 18. on resistance sd v s a a v d i s (off) i d (off) 06357-004 figure 19. off leakage sd a v d i d (on) nc nc = no connect 0 6357-005 figure 20. on leakage v dd v s v dd nc network analyzer sxb sxa gnd dx 50? 50 ? v out r l 50 ? 0.1f off isolation = 20 log v out v s 0 6357-009 nc = no connect figure 21. off isolation v out v dd v dd gnd v s r l 50? r l 50? 0.1f 50? sxa dx sxb channel-to-channel crosstalk = 20 log v out v s 0 6357-010 network analyzer figure 22. channel-to-channel crosstalk network analyzer r l 50? gnd v dd v dd v out v s sxa sxb 0.1f dx 50? insertion loss = 20 log v out with switch v out without switch 06357-011 figure 23. C3 db bandwidth
adg790 rev. 0 | page 12 of 20 50% 50% 90% 10% v in v out t on t off 0.1f v dd v s inx sxa sxb dx v dd gnd r l 50 ? c l 35pf v out 0 6357-006 figure 24. switching times (t on , t off ) 80% 80% v in v out t bbm t bbm 50% 50% 0v v s 0 6357-007 0.1f v dd v s sxa dx v dd gnd r l 50 ? c l 35pf v out sxb inx figure 25. break-before-make time delay (t bbm ) v in v out v out q inj = c l v out c l 1nf v out nc 0.1f v dd v s sxa dx inx v dd gnd sxb 06357-008 nc = no connect sxb to dx on sxb to dx off figure 26. charge injection
adg790 rev. 0 | page 13 of 20 theory of operation the adg790 is a single-chip, cmos switching solution that comprises four spdt switches and two 4:1 multiplexers. the internal architecture used by the device groups the switches into two sections, each optimized to provide the best performance in terms of bandwidth and distortion. the on-chip parallel interface controls the operation of all switches, allowing the user to control switches from both sections simultaneously. wide bandwidth section the wide bandwidth section contains three spdt switches s1a/s1b-d1, s2a/s2b-d2, and s3a/s3b-d3. these switches use a cmos topology that ensures, besides low on resistance and excellent flatness, the ability to switch signals up to the supply rails. this, combined with the low switch capacitance, provides the wide bandwidth required when switching high frequency signals. the three spdt switches are also optimized to provide low propagation delay and excellent matching between the channels, making the adg790 ideal for applica- tions that use multiple signals, such as universal usb switches (full and high speed), or rgb video signals, such as vga. low distortion section the low distortion section contains a single spdt switch (s4a/s4b-d4) and two 4:1 multiplexers (s5a/s5b/s5c/s5d-d5 and s6a/s6b/s6c/s6d-d6, respectively). the switches from this section also use a cmos topology that exhibits very low on resistance and flatness while maintaining a wide bandwidth that makes them suitable for a wide range of applications, including low distortion audio and standard definition video signals. the channels from the 4:1 multiplexers are matched to provide optimal performance when used with differential signals such as s-video. control interface the operation of the adg790 is controlled via a 4-wire parallel interface. the logic levels applied to the in1, in2, and in3 pins control the operation of the switches from both the wide band- width and low distortion sections, as shown in table 4 . the shutdown pin (s/d) allows the user to disable all four spdt switches and force the 4:1 multiplexers into the s5b and s6b positions, respectively. this function can be used to set up a low speed communication protocol between the circuitry from both sides of the device, which allows automatic configuration of the switching function. for example, in modern handset applications, where a single connector is used as a multifunction communication port, the s5b-d5 and s6b-d6 configuration obtained by setting the s/d pin high can be used to detect the type of peripheral device connected to the handset. the adg790 then automatically routes the required signals to the communication port connector. table 4. truth table logic control inputs switch status s/d in1 in2 in3 s1a-d1 s2a-d2 s3a-d3 s5d-d5 s6d-d6 s1b-d1 s2b-d2 s3b-d3 s4a-d4 s4b-d4 s5a-d5 s6a-d6 s5b-d5 s6b-d6 s5c-d5 s6c-d6 1 x 1 x 1 x 1 off off off off off on off 0 0 0 0 off on off on off off on 0 0 0 1 on off on off off off off 0 0 1 0 off on on off off on off 0 0 1 1 off on on off off off on 0 1 0 0 off on on off on off off 0 1 0 1 on off off on off off off 0 1 1 0 off on off on on off off 0 1 1 1 off on off on off on off 1 x = logic state doesnt matter.
adg790 rev. 0 | page 14 of 20 evaluation board the adg790 evaluation board allows designers to evaluate the high performance of the device with a minimum of effort. the eval-adg790 includes a printed circuit board populated with the adg790; it can be used to evaluate the performance of the device. it interfaces to the usb port of a pc, allowing the user to easily program the adg790 through the usb port using the software provided with the board. schematics of the evaluation board are shown in figure 27 and figure 28 . the software runs on any pc that has microsoft? windows? 2000 or windows? xp installed. using the adg790 evaluation board the adg790 evaluation board is a test system designed to simplify the evaluation of the device. each input/output of the part comes with a standardized socket to allow connection to and from usb, cvbs, s-video, and vga signal sources. a data sheet for the adg790 evaluation board is also available with full information on setup and operation.
adg790 rev. 0 | page 15 of 20 + + + + reset *wakeup clkout ctl0/*flaga pa2/*sloe pa3/*wu2 pa4/fifoadr0 pa5/fifoadr1 pa6/*pktend pa7/*flagd/slcs rdy0/*slrd rdy1/*slwr ifclk xtalin xtalout dplus dminus scl sda pd7/fd15 pd6/fd14 pd5/fd13 pd4/fd12 pd3/fd11 pd2/fd10 pd1/fd9 pd0/fd8 pb7/fd7 pb6/fd6 pb5/fd5 pb4/fd4 pb3/fd3 pb2/fd2 pb1/fd1 pb0/fd0 5 4 8 9 15 16 52 51 50 49 48 47 46 45 25 24 23 22 21 20 19 18 reserved agnd avcc vcc 3 7 11 17 27 32 43 55 gnd 6 10 12 26 28 41 53 56 ctl1/*flagb ctl2/*flagc 42 44 54 29 33 34 35 36 37 38 39 40 1 2 13 14 30 31 pa0/ int0 pa1/ int1 a0 dvdd dvdd dvdd dvdd a1 a2 a3 c2 0.1f c1 10f r5 100k ? r4 100k ? dvdd dvdd dvdd r6 0 ? c3 0.1f c4 2.2f dvdd c14 0.1f r9 2.2k ? r8 2.2k ? u2 cy7c68013-56lfc 24lc64 u3 1 2 3 4 8 7 6 5 a0 a1 a2 v ss v cc wp scl sda y1 24mhz c13 12pf c12 12pf dvdd c5 0.1f c6 0.1f c7 0.1f c8 0.1f c9 0.1f c10 0.1f c11 0.1f shield 5 4 3 2 1 j14 gnd io d+ d? vbus usb-mini-b 5v usb dvdd adp3303ar-3.3 8 7 5 1 2 6 3 4 u4 in in sd out out nr err gnd c15 10f c16 0.1f c19 10f c17 0.1f green d1 r10 1k? r7 10k ? 06357-013 figure 27. eval-adg790 schematic usb controller section
adg790 rev. 0 | page 16 of 20 phono_dual 3 2 1 j1 gnd io1_i t1 t3 io2_i top bottom phono_dual 3 2 1 j2 gnd tx_i t2 t4 rx_i top bottom phono_dual 3 2 1 j3 gnd cvbs_i t5 t6 t7 t8 t11 t13 t12 t10 t9 mic_i top bottom r1 75? vbus usb2.od?_i usb2.od+_i v dd d? d+ gnd sh sh 1 2 3 4 5 6 j4 usb j7-1 j7-2 j7-3 j7-13 j7-14 j7-4 j7-5 j7-6 j7-7 j7-8 vgar_i vgag_i vgab_i vgah_i vgav_i t14 t15 r3 75? r2 75? svideoc_i svideoy_i svideoc_o svideoy_o t16 t17 4 3 2 1 j12 mini-din-4 j6 mini-din-4 2 3 4 1 1 4 3 2 io2/vgav/s-videoc/rx_o io1/vgah/s-videoy/tx_o 4 3 2 1 phono_dual 3 2 1 j5 gnd usbid_i t20 t32 t18 t19 usb2.oid/vgar_o top bottom phono_dual 2 3 1 j9 gnd io2/vgav/s-videoc/rx_o t29 t28 io1/vgah/s-videoy/tx_o bottom top tx_o rx_o phono_dual 2 3 1 j10 gnd mic/cvbs_o t31 t30 mic/cvbs_o bottom top cvbs_o mic_o phono_dual 2 1 2 3 4 5 6 3 1 j8 gnd io2/vgav/s-videoc/rx_o t27 t26 io1/vgah/s-videoy/tx_o bottom top io1_o io2_o usb2.oid j11 usb v dd d? d+ gnd sh sh vbus usb2.od?/vgag_o usb2.od+/vgab_o t21 t22 t23 t24 t25 vga r_o vga g_o vga b_o hsync_o vsync_o j13-4 j13-5 j13-6 j13-7 j13-8 j13-3 j13-2 j13-1 j13-13 j13-14 usb2.oid/vgar_o usb2.od?/vgag_o usb2.od+/vgab_o io1/vgah/s-videoy/tx_o io1/vgav/s-videoc/rx_o b1 e1 e5 b5 a3 f3 d1 d2 d3 d4 d5 d6 usb2.od?/vgag_o io1/vgah/s-videoy/tx_o io2/vgav/s-videoc/rx_o usb2.od+/vgab_o usb2.oid/vgar_o mic/cvbs_o c4 d4 d2 c2 dvdd t33 a0a1 a2a3 e3 d3 b3 c3 u1 adg790 s/d in3in2in1 v dd gnd gnd gnd s1a s1b s2a s2b s3a s3b s4a s4b s5a s5b s5c s5d s6a s6b s6c s6d vgag_i usb2.od?_i vgab_i usb2.od+_i vgar_i usbid_i mic_i cvbs_i tx_i io1_i svideoy_i vgah_i rx_i io2_i svideoc_i vgav_i 06357-014 a1 c1 f1 d1 f5 d5 a5 c5 a2 b2 a4 b4 f2 e2 f4 e4 figure 28. eval-adg790 schematic switch section
adg790 rev. 0 | page 17 of 20 outline dimensions a 12345 b c d e f seating plane 0.50 ball pitch 2.56 2.50 2.44 3.06 3.00 2.94 0.65 0.59 0.53 bottom view (ball side up) top view (ball side down) ball a1 corner 0.28 0.24 0.20 0.36 0.32 0.28 092106- a figure 29. 30-ball wafer level chip scale package [wlcsp] (cb-30-1) dimensions shown in millimeters ordering guide model temperature range package description package option ADG790BCBZ-REEL 1 C40c to +85c 30-ball wafer level chip scale package [wlcsp] cb-30-1 eval-adg790ebz 1 evaluation board 1 z = pb-free part.
adg790 rev. 0 | page 18 of 20 notes
adg790 rev. 0 | page 19 of 20 notes
adg790 rev. 0 | page 20 of 20 notes ?2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06357-0-1/07(0)

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